Publications

Google Scholar Profile

Title Cited by Year
Area-efficient 2-D shift-variant convolvers for FPGA-based digital image processing

F Cardells-Tormo, PL Molinet
Signal Processing Systems Design and Implementation, 2005. IEEE Workshop on …, 2005
51 2005
Optimisation of direct digital frequency synthesisers based on CORDIC

F Cardells-Tormo, J Valls-Coquillat
Electronics Letters 37 (21), 1278-1280, 2001
30 2001
Flexible hardware-friendly digital architecture for 2-D separable convolution-based scaling

F Cardells-Tormo, J Arnabat-Benedicto
IEEE Transactions on Circuits and Systems II: Express Briefs 53 (7), 522-526, 2006
21 2006
Optimized FPGA-implementation of quadrature DDS

F Cardells-Tormo, A Valls-Coquillat
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on 5, V-V, 2002
19 2002
Efficient FPGA-based QPSK demodulation loops: Application to the DVB standard

F Cardells-Tormo, J Valls-Coquillat, V Almenar-Terre, V Torres-Carot
Field-Programmable Logic and Applications: Reconfigurable Computing Is Going …, 2002
15 2002
Configurable hardware/software architecture for data acquisition implementation on FPGA

M Bautista-Palacios, L Baldez, J Sempere-Agulló, F Cardells-Tormo, …
Field Programmable Logic and Applications, 2005. International Conference on …, 2005
14 2005
Area-optimized implementation of quadrature direct digital frequency synthesizers on LUT-based FPGAs

F Cardells-Tormo, J Valls-Coquillat
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2003
14 2003
Design of a DVB-S receiver in FPGA

F Cardells-Tormo, A Perez-Pascual, V Torres-Carot, J Valls-Coquillat, …
Signal Processing Systems, 2003. SIPS 2003. IEEE Workshop on, 6-11, 2003
8 2003
High performance quadrature digital mixers for FPGAs

F Cardells-Tormo, J Valls-Coquillat
FPL, 905-914, 2002
8 2002
Symbol timing synchronization in FPGA-based software radios: Application to DVB-S

F Cardells-Tormo, J Valls-Coquillat, V Almenar-Terre
Field Programmable Logic and Application, 31-40, 2003
4 2003
Implementing high-speed double-data rate (DDR) SDRAM controllers on FPGA

E Picatoste-Olloqui, F Cardells-Tormo, J Sempere-Agullo, …
Field Programmable Logic and Application, 279-288, 2004
1 2004
Quadrature direct digital frequency synthesizers: area-optimized design map for LUT-based FPGAs

F Cardells-Tormo, J Valls-Coquillat
Circuits and Systems, 2003. ISCAS’03. Proceedings of the 2003 International …, 2003
2003
Complex Applications

F Cardells-Tormo, J Vails-Coquillat
Field-programmable Logic and Applications:… International Workshop, FPL …, 2002
2002